Embedded Linux

Enabling Watchdog Timers on the Zynq Ultrascale+ MPSoC: Step by Step

Leave a Comment / Embedded Linux, FPGAs, Watchdog Timer

Reading Time: 5 minutes Introduction Today’s Embedded systems have become quite complex, often containing multiple processors and software. As such, the risk of a system locking up becomes more of a concern. To that end, watchdog timer peripherals have become an integral part of these systems. A hardware watchdog timer is a type of timer that, once enabled, requires […]

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Tracing the Root of Linux Kernel Problems with Error Messages

Leave a Comment / Device Drivers, Embedded Linux

Reading Time: 3 minutes Introduction When setting up Linux on a new board, you are bound to encounter issues. These issues can range from preventing the kernel from booting to emitting warnings or causing drivers to fail registration or probing. Regardless of the specific issue, the result is a system that does not function as intended. Debugging is the

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Kernel Drivers vs. Userspace Drivers: A Guide for Embedded Linux Developers

Leave a Comment / Device Drivers, Embedded Linux

Reading Time: 4 minutes Introduction In Embedded Linux projects, developers dedicate a substantial amount of time to managing external hardware interfaces. A common dilemma they face is deciding between developing a custom kernel driver (kernel module) or a userspace driver/application for a specific device. This decision can be intricate, as the optimal approach hinges on multiple factors. Making the

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Practical Tips for Creating Systemd Services in Yocto

Leave a Comment / Embedded Linux, Yocto

Reading Time: 3 minutes Introduction Systemd is a widely adopted service manager in modern Linux systems responsible for initializing, loading, and managing essential components and services required for the system to operate correctly. Its popularity extends beyond traditional Linux systems into the realm of Embedded Linux, where it is increasingly becoming the default choice in Yocto based distributions. Given

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Demystifying PL-PS Interrupts and Device Tree Configuration on the Zynq UltraScale+

Leave a Comment / Embedded Linux, FPGAs, xilinx

Reading Time: 3 minutes Introduction and Problem The AMD Zynq Ultrascale+ contains many available interrupt sources in its design. Most notably, are the interrupt channels available between the PL (Programmable Logic / FPGA) and the PS (processing system). This enables FPGA IP within the device to trigger interrupts in software. Although this high-level concept is relatively simple, the intricate

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Leveraging Systemd for Hardware Watchdog Control in Embedded Linux

Leave a Comment / Embedded Linux

Reading Time: 3 minutes Introduction In embedded systems, the hardware watchdog timer is a crucial yet often overlooked feature, especially in Linux systems. Many modern system-on-chips (SoCs) include an internal watchdog timer with upstream Linux support. With the growing complexity and extensive software suite of a custom Embedded Linux system, it is possible for such systems to experience freezing

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Debugging Embedded Software: A Simple Sanity Check for Code Compilation

Leave a Comment / Embedded Linux

Reading Time: 2 minutes Introduction and Problem: As Embedded software engineers, we often work on various projects and modules, leading to complex codebases and build systems. When making changes, it can be challenging to determine if the code is compiling as expected, especially in Linux-based systems or in AMP (Asymmetric Multi-Processing) applications, as we are often developing or testing

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Overcoming Software Limitations in AMD-based FPGA Video Designs

Leave a Comment / amd, design practices, Embedded Linux, FPGAs, medical, Uncategorized, v4l2, video capture, xilinx

Reading Time: 5 minutes Introduction In today’s market, video capture and display designs have become very common, especially in fields like the medical industry. While both FPGAs and traditional SoCs offer hardware IP that enable video capture, the former are a popular design choice, given the ability to fully customize a video pipeline, and the flexibility in both the

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Controlling Zynq Ultrascale+ pl_resetn Signals in Software

Leave a Comment / Embedded Linux, FPGAs

Reading Time: 5 minutes Introduction Oftentimes, it is desirable for a system to be able to dynamically control the FPGA logic resets in software. There are a number of reasons for this, but throughout my career, I have found that when developing and testing the software for an FPGA, you often may run into situations where due to mistakes

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